The present invention relates to a CMOS process which yields high-voltage devices.
High-voltage CMOS devices are highly desirable for many applications, including display drivers, nonvolatile memories, communications circuits, and control circuits, particularly where low power consumption is desired. However, a difficulty in the prior art has been that high-voltage CMOS processes would use a very large number of masks.
Thus, it is an object of the present invention to provide a high-voltage CMOS process with a low mask count for reasonably small geometries.
It is a further object of the present invention to provide a CMOS process suitable for 15 volt operation with 5 micron geometries which has a low mask count.
It is a further object of the present invention to provide a double-poly high-voltage CMOS process using 9 or fewer masks.
It is particularly desirable to provide a process for CMOS circuits having an operating voltage of 10 volts or higher, since conventional CMOS processes cannot be directly scaled to such levels.